propose a new instruction to the SRC to accomplish the same thing

Instruction Design Take the SRC (Simple Risc Computer, link) instruction sequence provided below and determine the operation of the sequence (explain this operation in words). Then propose a new instruction to the SRC to accomplish the same thing. You must provide abstract RTL and concrete RTL for the new instruction based on the 1-bus architecture from the textbook. If required, you may modify the architecture. shr r0, r1, 15 andi r0, r0, 1 addi r2, r1, 0 lar r31, done brzr r31, r0 la r0, 0xFFFF shl r0, r0, 16 or r2, r1, r0 done: … Note: r0 is used only as a temporary register in this code sequence and should not be part of your new instruction. Your new instruction should be of the form new_instr rn, rm and should not affect any other general purpose registers than rn and rm (in the above code sequence, rm would be r1 and rn would be r2). 2) Computer Architecture (the FRACTION computer) The use of floating point numbers (or fixed point for that matter) inherently introduces error into computations. To remove all error, all computations should be performed as fractions. Therefore, the FRACTION is proposed as an “exact” computer architecture. The core concept to the FRACTION is a new data type, the fraction. A fraction is a 32-bit piece of data, comprised of a 16-bit numerator in the upper half of the data, and a 16-bit denominator in the lower 16 bits. Numerator (16-bits) Denominator (16-bits) The proposed architecture then performs standard fraction arithmetic (+, -, ?, ?). The standard ALU on our existing architecture can handle all standard integer based arithmetic, but there are several functions required to support fraction arithmetic. To manage this extra capability, we modify the 1-bus SRC architecture to include a new functional unit called the Fraction Unit (FrU) in addition to the standard ALU.